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  • CASANÃS, César William Vera; http://lattes.cnpq.br/0968329902273172 (Universidade Federal de ItajubáBrasilIESTI - Instituto de Engenharia de Sistemas e Tecnologia da InformaçãoPrograma de Pós-Graduação: Doutorado - Engenharia ElétricaUNIFEI, 2022-04-14)
    In this work a technique to bias a CMOS current comparator is presented. The current comparator circuit uses the flipped voltage follower (FVF) block as input stage, and a cascode structure is proposed to bias properly ...