Implementação de um medidor de taxa de erro de bits com CRC utilizando linguagem VHDL

Abstract

This work presents the project of a device with a low cost to measure the bit error rate in data communications systems. Through the detention of the errors occurred during the transmission of the data in a certain interval of time, it is gotten measure it of bits error rate. This work also shows the program developed in VHDL language by using MAX+PLUS II tool, (version 10.2, of ALTERA Company) that simulates the functioning of measurer device bit error rate proposed.